I. Field
The present disclosure relates generally to electronic circuits, and more specifically to a content addressable memory.
II. Background
A content addressable memory (CAM) is an array of memory cells and associated comparison circuits. These comparison circuits allow for fast searches of the contents of the memory array. All of the rows of the memory array may be searched/evaluated in parallel to determine whether or not an input value matches the value stored in any of the rows. Each row is associated with a respective match line that indicates the search result for that row. The match line for each row that matches the input value is asserted (e.g., to logic high) to indicate a match, and the match line for each row that does not match the input value is de-asserted (e.g., to logic low) to indicate a mismatch.
CAM is used for various applications such as, e.g., a cache memory. The cache memory may be accessed faster than other types of memory and is used to store data that is more likely to be accessed by a processor. The cache memory may include a random access memory (RAM) that stores the data and a CAM that stores the addresses of the data. To determine whether a given word of data is stored in the cache-memory, the CAM is searched to determine whether the address of this word matches any of the addresses stored in the CAM. If there is a match, then the desired word may be retrieved from the RAM for use.
The CAM may be searched extensively, e.g., for each processor instruction with a memory access. Hence, the performance of the CAM typically has a large impact on the performance of the processor. Fast search speed may be achieved by searching all of the rows of the CAM in parallel. However, the parallel search consumes a large amount of power, which is undesirable for many applications.
There is therefore a need in the art for a CAM with high performance and lower power consumption.